For protecting an integrated circuit from electrostatic discharge, an ESD (Electrostatic Discharge) protective circuit may be used. A high voltage integrated circuit, which uses a high driving voltage, and is operated in an environment vulnerable to static electricity, such as an automobile, requires an ESD protection level higher than a general logic integrated circuit. In general, a DENMOS (Drain Extended NMOS) or a high voltage diode (HV-Diode) may be used as a high voltage ESD protective device.
FIG. 1 illustrates a section of a related art HV-diode ESD protective device. Referring to FIG. 1, an HV-diode requires a breakdown voltage about 1.5 times higher than a driving voltage. A drift region N-Drift having an impurity concentration lower than an active region may be formed at an anode region N+ on which the breakdown voltage depends for meeting the above condition.
Semiconductor fabrication processes regularly reduce design rules, increasing a depth of STI (Shallow Trench Isolation) for reducing off-state leakage by means of perfect isolation, resulting in poor efficiency of the ESD protective device. In particular, a resistance increase between two electrodes N+ and P+ within a high voltage well (HP well) can impair a forward bias characteristic, compared to a reverse bias characteristic of a diode device.